Repository Analysis

vosen/ZLUDA

CUDA on non-NVIDIA GPUs

1.1 Likely human-written View on GitHub
1.1
Adjusted Score
1.1
Raw Score
100%
Time Factor
2026-05-28
Last Push
14,232
Stars
Rust
Language
331,420
Lines of Code
391
Files
325
Pattern Hits
2026-05-31
Scan Date

Score History

Severity Breakdown

CRITICAL 0HIGH 0MEDIUM 23LOW 302

Pattern Findings

325 matches across 6 categories. Click a row to expand file-level details.

Over-Commented Block298 hits · 264 pts
SeverityFileLineSnippet
LOWcuda_types/src/nvml.rs701 ///!< Process ID
LOWcuda_types/src/nvml.rs1661pub struct nvmlUUIDType_t(pub ::core::ffi::c_uint);
LOWcuda_types/src/nvml.rs1901 which is equivalent to NVML_COMPUTEMODE_EXCLUSIVE_THREAD in CUDA 4.0 and beyond.*/
LOWcuda_types/src/nvml.rs2201/// Clock offset info.
LOWcuda_types/src/nvml.rs2421 ///!< PID of process
LOWcuda_types/src/nvml.rs2461 ///!< The version number of this struct
LOWcuda_types/src/nvml.rs2921pub use self::nvmlDeviceVgpuCapability_enum as nvmlDeviceVgpuCapability_t;
LOWcuda_types/src/nvml.rs2961#[repr(C)]
LOWcuda_types/src/nvml.rs2981 ///!< The version number of this struct
LOWcuda_types/src/nvml.rs3021 ///!< Decoder Util Value
LOWcuda_types/src/nvml.rs3061 ///!< Encoder Util Value
LOWcuda_types/src/nvml.rs3101 ///!< Return only samples with timestamp greater than lastSeenTimeStamp
LOWcuda_types/src/nvml.rs3141#[repr(C)]
LOWcuda_types/src/nvml.rs3221/// Structure to store the vGPU scheduler capabilities
LOWcuda_types/src/nvml.rs3241}
LOWcuda_types/src/nvml.rs3301 ///!< Licensed feature code
LOWcuda_types/src/nvml.rs3361#[repr(C)]
LOWcuda_types/src/nvml.rs3381 ///!< OUT: Maximum number of vGPU instances per GPU instance
LOWcuda_types/src/nvml.rs3401#[derive(Copy, Clone)]
LOWcuda_types/src/nvml.rs3441 ///!< OUT: Scheduler policy
LOWcuda_types/src/nvml.rs3541/// Led color enum.
LOWcuda_types/src/nvml.rs3661/// nvmlSystemEventSetCreateRequest
LOWcuda_types/src/nvml.rs4021 ///!< ID of the fabric clique to which this GPU belongs
LOWcuda_types/src/nvml.rs4141/// Struct to represent per device NVLINK information v2
LOWcuda_types/src/nvml.rs4181 ///!< vGPU virtualization capabilities bitfield
LOWcuda_types/src/nvml.rs4281#[repr(transparent)]
LOWcuda_types/src/nvml.rs5521}
LOWcuda_types/src/nvml.rs5641#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
LOWcuda_types/src/nvml.rs5681 pub enforcedProfilesMask: nvmlMask255_t,
LOWcuda_types/src/cuda.rs3301pub type CUaccessPolicyWindow = CUaccessPolicyWindow_v1;
LOWcuda_types/src/cuda.rs3361pub type CUDA_KERNEL_NODE_PARAMS = CUDA_KERNEL_NODE_PARAMS_v2;
LOWcuda_types/src/cuda.rs3401 ///< Value to be set
LOWcuda_types/src/cuda.rs4681 ///< Destination pitch (ignored when dst is array)
LOWcuda_types/src/cuda.rs4801 ///< Height of 3D memory copy
LOWcuda_types/src/cuda.rs5881/// External semaphore wait parameters
LOWcuda_types/src/cuda.rs6861 ///< The ownership relationship of the child graph node.
LOWcuda_types/src/cuda.rs7201#[derive(Debug, Copy, Clone, Hash, PartialEq, Eq)]
LOWcuda_types/src/cuda.rs7221pub struct CUcheckpointCheckpointArgs_st {
LOWptx/lib/zluda_ptx_impl.cpp41../../ext/llvm-project/build/bin/llvm-as - -o zluda_ptx_impl.bc && \
LOWptx/lib/zluda_ptx_impl.cpp261 }
LOWptx/src/pass/normalize_basic_blocks.rs1use super::*;
LOWptx/src/pass/instruction_mode_to_global_mode/mod.rs661 apply_global_mode_controls(directives, temp)
LOWptx/src/pass/instruction_mode_to_global_mode/mod.rs1621// * Does this basic block value has a value that can lead to a conflict if we
LOWptx/src/pass/instruction_mode_to_global_mode/mod.rs1641// │ A │
LOWptx/src/pass/instruction_mode_to_global_mode/mod.rs1961
LOWptx/src/pass/instruction_mode_to_global_mode/mod.rs1981// minimize the number of such insertions. This structure holds all the data necessary to resolve
LOWptx/src/pass/llvm/emit.rs1// We use Raw LLVM-C bindings here because using inkwell is just not worth it.
LOWcuda_macros/src/lib.rs21const CUFFT_RS: &'static str = include_str! {"cufft.rs"};
LOWzluda/src/impl/device.rs321 //[MAXIMUM TEXTURE1D LAYERED LAYERS],
LOWzluda/src/impl/device.rs341 //[MAXIMUM SURFACE2D LAYERED WIDTH],
LOWzluda/src/impl/device.rs381 //[HANDLE TYPE WIN32 HANDLE SUPPORTED],
LOWext/rocm_smi-sys/src/lib.rs1181 currently active.*/
LOWext/highs-sys/README.md101// The scalar n is numcol
LOWext/highs-sys/README.md121// * The position in aindex/avalue of the index/value of the first
LOWext/highs-sys/tests/test_highs_call.rs1use highs_sys::*;
LOWext/highs-sys/tests/test_highs_call.rs21 //
LOWext/highs-sys/tests/test_highs_call.rs41 // The vector x is colvalue
LOWext/rocblas-sys/src/lib.rs1// Generated automatically by zluda_bindgen
LOWext/detours/tests/test_image_api.cpp1//////////////////////////////////////////////////////////////////////////////
LOWext/detours/tests/catch.hpp21# pragma clang system_header
238 more matches not shown…
Decorative Section Separators21 hits · 92 pts
SeverityFileLineSnippet
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs1630// ┌─────┐ ┌─────┐ ┌─────┐
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs1632// └─────┘ └─────┘ └─────┘
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs1635// │ ┌──────────────┐
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs1636// └───────┤ B │
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs1637// └──────────────┘
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs1640// ┌─────┐
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs1642// └─────┘
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs1968// │ k0 │──────┐
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs1971// ┌──────────┐
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs1973// └──────────┘
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs1976// │ k1 │──────┘
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs1989 // │ k0 │──────────────────────┐
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs1992 // ┌───────────┐
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs1994 // └───────────┘
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs1997 // │ k1 │──────────────────────┘
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs1999 // │ ┌────────────┐
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs2000 // ├─────────>│ bb1: false │
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs2001 // │ └────────────┘
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs2002 // │ ┌────────────┐
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs2003 // └─────────>│ bb2: false │
MEDIUMptx/src/pass/instruction_mode_to_global_mode/mod.rs2004 // └────────────┘
AI Slop Vocabulary2 hits · 6 pts
SeverityFileLineSnippet
MEDIUMcuda_types/src/cuda.rs8830/// Enum for specifying how to leverage floating-point emulation algorithms
MEDIUMcuda_types/src/cuda.rs8833/// Enum for specifying how to leverage floating-point emulation algorithms
Unused Imports2 hits · 2 pts
SeverityFileLineSnippet
LOWptx_parser/src/check_args.py1
LOWptx_parser/src/check_args.py1
Hyper-Verbose Identifiers1 hit · 1 pts
SeverityFileLineSnippet
LOWcuda_macros/src/cuda.rs12236 function cudaTriggerProgrammaticLaunchCompletion(). A trigger can also be
Deep Nesting1 hit · 1 pts
SeverityFileLineSnippet
LOWptx_parser/src/check_args.py49