Chisel: A Modern Hardware Design Language
This report presents the forensic synthetic code analysis of chipsalliance/chisel, a Scala project with 4,721 GitHub stars. SynthScan v2.0 examined 156,111 lines of code across 827 source files, recording 66 pattern matches distributed across 8 syntactic categories. The overall adjusted score of 2.7 places this repository in the Likely human-written band.
The scanner applied 160+ deterministic lexical heuristics, multi-line block detectors, abstract syntax tree depth profilers, and a cross-file Jaccard similarity matrix to construct a statistically normalised synthetic code estimate. All matches are individually weighted by severity coefficient and contextual multiplier before summation, and the resulting headline score is temporally discounted to account for the repository's development history relative to the commercial emergence of large language model coding tooling (November 2022 onward).
Longitudinal tracking requires multiple scan runs. Once this repository is re-scanned after new commits land, this chart will visualise how the synthetic code signal evolves over time — enabling you to detect whether AI authorship is growing, stabilising, or being actively corrected by human engineers.
Classifies detected patterns by their diagnostic confidence and structural impact. CRITICAL patterns (coefficient 10) represent definitive synthetic signatures — hallucinated imports, explicit LLM attribution metadata — virtually never produced by human authors. HIGH (5) indicates strong structural tells such as cross-file repetition or cross-linguistic idioms. MEDIUM (2) covers recognisable conversational padding and AI-specific vocabulary. LOW (1) captures subtle indicators like tautological comments and generic boilerplate that require density to carry independent signal.
This horizontal bar chart decomposes the repository's raw synthetic code score by top-level directory, allowing you to pinpoint precisely which modules or components carry the highest AI authorship density. Directories with disproportionately high scores relative to their size warrant targeted manual review: concentrated AI signatures often trace back to mass-generated configuration layers, auto-ported test suites, LLM-scaffolded boilerplate classes, or entire subsystems authored under heavy copilot assistance. Use this view to prioritise your human code-review effort.
The scanner identified 66 distinct pattern matches across 8 syntactic categories. Each entry below represents a discrete location in the source code where the engine recorded a statistically significant AI authorship indicator. Expand any category row to inspect the individual file paths, line numbers, code snippets, and the lexical context (CODE, COMMENT, or STRING) in which each match was detected.
Reading the findings table: The Severity column indicates the diagnostic confidence level (CRITICAL / HIGH / MEDIUM / LOW). The Context column identifies whether the match occurred inside executable code, an inline comment, or a string literal — comment-context matches receive a ×1.5 weight because LLMs systematically over-annotate. The ⚡ bolt icon marks clustered matches: three or more patterns within a 10-line window, each receiving an additional ×1.5 density multiplier as dense clusters constitute far stronger evidence of synthetic authorship than isolated hits.
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| CRITICAL | …chisel3/experimental/SerializableModuleGenerator.scala | 73 | !generator.getConstructors.head.getParameterTypes.last.toString.contains("$"), | CODE |
| CRITICAL | src/test/scala/chiselTests/MultiClockSpec.scala | 129 | svsim.verilator.Backend.CompilationSettings.default.withDisabledWarnings(Seq("MULTIDRIVEN")) | CODE |
| CRITICAL⚡ | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 63 | assert(dut.io.out.bits.cmp.peekValue().asBigInt == expectedCmp.litValue) | CODE |
| CRITICAL⚡ | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 64 | assert(dut.io.out.bits.cmp.peek() == expectedCmp) | CODE |
| CRITICAL⚡ | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 65 | assert(dut.io.out.bits.vSum.zip(expectedVSum).forall { case (portEl, expEl) => | CODE |
| CRITICAL⚡ | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 68 | assert(dut.io.out.bits.vSum.peek().litValue == expectedVSum.litValue) | CODE |
| CRITICAL⚡ | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 69 | assert(dut.io.out.bits.vOutProduct.zip(expVecProduct).forall { case (portVecEl, expVecEl) => | CODE |
| CRITICAL⚡ | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 115 | dut.io.out.bits.c.expect(expectedScalar) | CODE |
| CRITICAL⚡ | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 116 | dut.io.out.bits.c.expect(expectedScalar.U) | CODE |
| CRITICAL⚡ | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 117 | dut.io.out.bits.c.expect(expectedScalar.U(w.W)) | CODE |
| CRITICAL⚡ | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 118 | dut.io.out.bits.cmp.expect(expectedCmp) | CODE |
| CRITICAL⚡ | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 121 | dut.io.out.bits.vSum.expect(expectedVSum) | CODE |
| CRITICAL⚡ | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 126 | dut.io.out.bits.vOutProduct.expect(expVecProduct) | CODE |
| CRITICAL⚡ | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 166 | dut.io.out.bits.c.expect(3) // correct | CODE |
| CRITICAL⚡ | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 167 | dut.io.out.bits.c.expect(5.U) // incorrect | CODE |
| CRITICAL⚡ | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 170 | thrown.getMessage must include("dut.io.out.bits.c.expect(5.U)") | CODE |
| CRITICAL | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 191 | dut.io.out.bits.c.expect(5.U, ExpectationValueFormat.Hex) | CODE |
| CRITICAL | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 216 | dut.io.out.bits.c.expect(5.U, ExpectationValueFormat.Bin) | CODE |
| CRITICAL | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 253 | dut.io.out.bits.c.expect(jumpInst.U(w.W), customFormat) | CODE |
| CRITICAL | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 281 | dut.io.out.bits.c.expect(5.U, customFormat) | CODE |
| CRITICAL | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 306 | dut.io.out.bits.c.expect(BigInt(5), "bigint message") | CODE |
| CRITICAL | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 331 | dut.io.out.bits.c.expect(5.U, ExpectationValueFormat.Hex) | CODE |
| CRITICAL | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 353 | dut.io.out.bits.c.expect(5.U, ExpectationValueFormat.Dec) | CODE |
| CRITICAL | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 375 | dut.io.out.bits.c.expect(5.U) | CODE |
| CRITICAL | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 489 | dut.io.out.bits.vOutProduct.expectPartial(expVecProductPartial) | CODE |
| CRITICAL | …test/scala/chiselTests/simulator/PeekPokeAPISpec.scala | 572 | dut.io.out.bits.vOutProduct.expectPartial(expVecProductPartial) | CODE |
| CRITICAL | …la/chiselTests/simulator/scalatest/ChiselSimSpec.scala | 396 | svsim.verilator.Backend.CompilationSettings.default.withTraceStyle( | CODE |
| CRITICAL | …la/chiselTests/simulator/scalatest/ChiselSimSpec.scala | 413 | svsim.verilator.Backend.CompilationSettings.default.withTraceStyle( | CODE |
| CRITICAL | …la/chiselTests/simulator/scalatest/ChiselSimSpec.scala | 417 | svsim.verilator.Backend.CompilationSettings.TraceKind.Fst(Some(2)), | CODE |
| CRITICAL | …n/scala/chisel3/util/experimental/decode/decoder.scala | 102 | chisel3.util.experimental.decode.TruthTable.fromString( | CODE |
| CRITICAL | src/main/scala/chisel3/simulator/scalatest/Cli.scala | 83 | svsim.vcs.Backend.CompilationSettings.TraceSettings.FsdbSettings( | CODE |
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| LOW | …main/scala-2/chisel3/experimental/SourceInfoIntf.scala | 1 | // SPDX-License-Identifier: Apache-2.0 | COMMENT |
| LOW | core/src/main/scala/chisel3/Aggregate.scala | 1101 | def elements: SeqMap[String, Data] | COMMENT |
| LOW | core/src/main/scala/chisel3/package.scala | 121 | */ | COMMENT |
| LOW | svsim/src/main/resources/simulation-driver.cpp | 21 | * required (or recommended) to wait until receiving a message in response to a | COMMENT |
| LOW | svsim/src/main/resources/simulation-driver.cpp | 41 | #include "verilated-sources/VsvsimTestbench__Dpi.h" | COMMENT |
| LOW | svsim/src/main/resources/simulation-driver.cpp | 81 | // can be sent prior to receiving this message. | COMMENT |
| LOW | svsim/src/main/resources/simulation-driver.cpp | 101 | // Sent in response to the LOG command. The length of the log is provided | COMMENT |
| LOW | svsim/src/main/resources/simulation-driver.cpp | 121 | COMMAND_GET_BITS = 'G', | COMMENT |
| LOW | svsim/src/main/resources/simulation-driver.cpp | 141 | // if the sentinel port is set to the specified value. | COMMENT |
| LOW | website/docusaurus.config.js | 21 | // same name as their parent directory or have the name `index.md` now map | COMMENT |
| LOW | …cala-2/chisel3/internal/naming/NamingAnnotations.scala | 1 | // SPDX-License-Identifier: Apache-2.0 | COMMENT |
| LOW | src/test/scala/chiselTests/BundleSpec.scala | 201 | "(a=UInt<8>(8), b=Bool(true), c=UInt<4>(DontCare)) contains DontCare" | COMMENT |
| LOW | src/main/scala/chisel3/util/SparseVec.scala | 141 | COMMENT | |
| LOW | src/main/scala/chisel3/util/SparseVec.scala | 161 | // Index -> DenseVecIndex -> DenseVec(index) | COMMENT |
| LOW | src/main/scala/chisel3/simulator/Simulator.scala | 341 | case error: Throwable => | COMMENT |
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| LOW⚡ | core/src/main/scala/chisel3/internal/Error.scala | 86 | // Step 1: Remove elements from the top in the package trimlist | COMMENT |
| LOW⚡ | core/src/main/scala/chisel3/internal/Error.scala | 91 | // Step 2: Optionally remove elements from the bottom until the anchor | COMMENT |
| LOW⚡ | core/src/main/scala/chisel3/internal/Error.scala | 94 | // Step 3: Remove elements from the bottom in the package trimlist | COMMENT |
| LOW⚡ | core/src/main/scala/chisel3/internal/Error.scala | 96 | // Step 4: Reverse back to the original order | COMMENT |
| LOW⚡ | core/src/main/scala/chisel3/internal/Error.scala | 99 | // Step 5: Add ellipsis stack trace elements and "--full-stacktrace" info | COMMENT |
| LOW⚡ | core/src/main/scala/chisel3/internal/Error.scala | 107 | // Step 6: Mutate the stack trace in this exception | COMMENT |
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| LOW⚡ | core/src/main/scala/chisel3/internal/Error.scala | 86 | // Step 1: Remove elements from the top in the package trimlist | COMMENT |
| LOW⚡ | core/src/main/scala/chisel3/internal/Error.scala | 91 | // Step 2: Optionally remove elements from the bottom until the anchor | COMMENT |
| LOW⚡ | core/src/main/scala/chisel3/internal/Error.scala | 94 | // Step 3: Remove elements from the bottom in the package trimlist | COMMENT |
| LOW⚡ | core/src/main/scala/chisel3/internal/Error.scala | 96 | // Step 4: Reverse back to the original order | COMMENT |
| LOW⚡ | core/src/main/scala/chisel3/internal/Error.scala | 99 | // Step 5: Add ellipsis stack trace elements and "--full-stacktrace" info | COMMENT |
| LOW⚡ | core/src/main/scala/chisel3/internal/Error.scala | 107 | // Step 6: Mutate the stack trace in this exception | COMMENT |
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| MEDIUM | …scala/chisel3/experimental/hierarchy/Instantiate.scala | 41 | // A more complete and robust solution would require either refining hashCode and equality on Data | COMMENT |
| MEDIUM | .github/workflows/release-notes.yml | 42 | # Put output through env variable to make it robust to quotes | COMMENT |
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| LOW | lit/tests/lit.cfg.py | 1 | CODE | |
| LOW | lit/tests/lit.cfg.py | 3 | CODE | |
| LOW | lit/tests/lit.cfg.py | 4 | CODE |
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| LOW | …/main/scala/chisel3/internal/BuilderContextCache.scala | 25 | def getOrElse[A](key: Key[A], default: => A): A = cache.getOrElse(key, default).asInstanceOf[A] | CODE |
| LOW | …/main/scala/chisel3/internal/BuilderContextCache.scala | 31 | def getOrElseUpdate[A](key: Key[A], default: => A): A = cache.getOrElseUpdate(key, default).asInstanceOf[A] | CODE |
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| LOW | …/chiselTests/experimental/hierarchy/InstanceSpec.scala | 1041 | // TODO don't forget to test this with heterogeneous Views (eg. viewing a tuple of a port and non-port as a single Bun | COMMENT |