Open-source, low-cost 10.5 GHz PLFM phased array RADAR system
This report summarizes scanner evidence for NawfalMotii79/PLFM_RADAR, a PLSQL project with 26,841 GitHub stars. SynthScan examined 75,937 lines of code across 270 source files, recording 1014 pattern matches distributed across 18 syntactic categories. The legacy adjusted pattern signal is 28.1 (Elevated pattern signal); it is not an authorship estimate.
Use the findings to ask whether maintainers can explain intent, verify dependencies, simplify unnecessary scaffolding, and focus review effort. Risk Payload v1 adds ownership, supply-chain, over-engineering, and review-effort vectors when available. These are prompts for human verification, not probabilities, security findings, or measured maintenance costs.
Use each vector to guide manual verification of the underlying findings.
Can maintainers explain intent, assumptions, and trade-offs? 389 finding(s).
Are imports declared and package/API names verified? 89 finding(s).
Are wrappers, guards, and repeated structures necessary? 668 finding(s).
Which changes need focused human review? 1014 finding(s).
This chart tracks the legacy adjusted pattern score across scan runs. Changes can reflect source changes, scan coverage, or detector/scoring versions; they do not measure AI adoption or prove that a team refactored code. Compare runs only when their scoring versions are compatible. The dashed line tracks the raw pattern-hit count.
Groups findings by configured severity weight. Severity is not a confidence estimate, security rating, or proof that a package is missing. Verify imports against the project's manifests and inspect each finding in its local design context.
This horizontal bar chart shows where configured pattern scores accumulate across directories. Treat the bars as locations to inspect, not as evidence of authorship or code quality. Use the file-level findings to decide whether a directory needs a focused ownership, dependency, complexity, or review check.
The scanner identified 1014 distinct pattern matches across 18 syntactic categories. Each entry below represents a discrete location in the source code where the engine recorded a detector match to inspect in context. Expand any category row to inspect the individual file paths, line numbers, code snippets, and the lexical context (CODE, COMMENT, or STRING) in which each match was detected.
Reading the findings table: The Severity column indicates the configured finding weight (CRITICAL / HIGH / MEDIUM / LOW). The Context column identifies whether the match occurred inside executable code, an inline comment, or a string literal — legacy comment-context matches receive a ×1.5 score weight. The ⚡ bolt icon marks clustered matches: three or more patterns within a 10-line window, each receiving an additional ×1.5 density multiplier under the legacy scoring model.
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| MEDIUM | pyproject.toml | 19 | # --------------------------------------------------------------------------- | COMMENT |
| MEDIUM | pyproject.toml | 21 | # --------------------------------------------------------------------------- | COMMENT |
| MEDIUM | 9_Firmware/tools/uart_capture.py | 44 | # --------------------------------------------------------------------------- | COMMENT |
| MEDIUM | 9_Firmware/tools/uart_capture.py | 46 | # --------------------------------------------------------------------------- | COMMENT |
| MEDIUM | 9_Firmware/tools/uart_capture.py | 89 | # --------------------------------------------------------------------------- | COMMENT |
| MEDIUM | 9_Firmware/tools/uart_capture.py | 91 | # --------------------------------------------------------------------------- | COMMENT |
| MEDIUM | 9_Firmware/tools/uart_capture.py | 175 | # --------------------------------------------------------------------------- | COMMENT |
| MEDIUM | 9_Firmware/tools/uart_capture.py | 177 | # --------------------------------------------------------------------------- | COMMENT |
| MEDIUM | 9_Firmware/tools/uart_capture.py | 223 | # --------------------------------------------------------------------------- | COMMENT |
| MEDIUM | 9_Firmware/tools/uart_capture.py | 225 | # --------------------------------------------------------------------------- | COMMENT |
| MEDIUM | 9_Firmware/tools/uart_capture.py | 312 | # --------------------------------------------------------------------------- | COMMENT |
| MEDIUM | 9_Firmware/tools/uart_capture.py | 314 | # --------------------------------------------------------------------------- | COMMENT |
| MEDIUM⚡ | 9_Firmware/tests/cross_layer/contract_parser.py | 23 | # --------------------------------------------------------------------------- | COMMENT |
| MEDIUM⚡ | 9_Firmware/tests/cross_layer/contract_parser.py | 25 | # --------------------------------------------------------------------------- | COMMENT |
| MEDIUM⚡ | 9_Firmware/tests/cross_layer/contract_parser.py | 35 | # =================================================================== | COMMENT |
| MEDIUM⚡ | 9_Firmware/tests/cross_layer/contract_parser.py | 37 | # =================================================================== | COMMENT |
| MEDIUM | 9_Firmware/tests/cross_layer/contract_parser.py | 105 | # =================================================================== | COMMENT |
| MEDIUM | 9_Firmware/tests/cross_layer/contract_parser.py | 107 | # =================================================================== | COMMENT |
| MEDIUM | 9_Firmware/tests/cross_layer/contract_parser.py | 276 | # =================================================================== | COMMENT |
| MEDIUM | 9_Firmware/tests/cross_layer/contract_parser.py | 278 | # =================================================================== | COMMENT |
| MEDIUM | 9_Firmware/tests/cross_layer/contract_parser.py | 667 | # =================================================================== | COMMENT |
| MEDIUM | 9_Firmware/tests/cross_layer/contract_parser.py | 669 | # =================================================================== | COMMENT |
| MEDIUM | 9_Firmware/tests/cross_layer/contract_parser.py | 753 | # =================================================================== | COMMENT |
| MEDIUM | 9_Firmware/tests/cross_layer/contract_parser.py | 755 | # =================================================================== | COMMENT |
| MEDIUM⚡ | …irmware/tests/cross_layer/test_cross_layer_contract.py | 233 | # =================================================================== | COMMENT |
| MEDIUM⚡ | …irmware/tests/cross_layer/test_cross_layer_contract.py | 235 | # =================================================================== | COMMENT |
| MEDIUM | …irmware/tests/cross_layer/test_cross_layer_contract.py | 50 | # =================================================================== | COMMENT |
| MEDIUM | …irmware/tests/cross_layer/test_cross_layer_contract.py | 52 | # =================================================================== | COMMENT |
| MEDIUM | …irmware/tests/cross_layer/test_cross_layer_contract.py | 164 | # =================================================================== | COMMENT |
| MEDIUM | …irmware/tests/cross_layer/test_cross_layer_contract.py | 166 | # =================================================================== | COMMENT |
| MEDIUM | …irmware/tests/cross_layer/test_cross_layer_contract.py | 741 | # =================================================================== | COMMENT |
| MEDIUM | …irmware/tests/cross_layer/test_cross_layer_contract.py | 743 | # =================================================================== | COMMENT |
| MEDIUM | …irmware/tests/cross_layer/test_cross_layer_contract.py | 939 | # =================================================================== | COMMENT |
| MEDIUM | …irmware/tests/cross_layer/test_cross_layer_contract.py | 941 | # =================================================================== | COMMENT |
| MEDIUM | …irmware/tests/cross_layer/test_cross_layer_contract.py | 1122 | # =================================================================== | COMMENT |
| MEDIUM | …irmware/tests/cross_layer/test_cross_layer_contract.py | 1124 | # =================================================================== | COMMENT |
| MEDIUM | 9_Firmware/tests/cross_layer/adar1000_vm_reference.py | 37 | # ---------------------------------------------------------------------------- | COMMENT |
| MEDIUM | 9_Firmware/tests/cross_layer/adar1000_vm_reference.py | 40 | # ---------------------------------------------------------------------------- | COMMENT |
| MEDIUM | 9_Firmware/tests/cross_layer/adar1000_vm_reference.py | 93 | # ---------------------------------------------------------------------------- | COMMENT |
| MEDIUM | 9_Firmware/tests/cross_layer/adar1000_vm_reference.py | 98 | # ---------------------------------------------------------------------------- | COMMENT |
| MEDIUM | 9_Firmware/tests/cross_layer/adar1000_vm_reference.py | 181 | # ---------------------------------------------------------------------------- | COMMENT |
| MEDIUM | 9_Firmware/tests/cross_layer/adar1000_vm_reference.py | 183 | # ---------------------------------------------------------------------------- | COMMENT |
| MEDIUM | 9_Firmware/9_3_GUI/requirements_pyqt_gui.txt | 2 | # ====================================================== | COMMENT |
| MEDIUM⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 31 | # ---------------------------------------------------------------- | COMMENT |
| MEDIUM⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 33 | # ---------------------------------------------------------------- | COMMENT |
| MEDIUM⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 71 | # ---------------------------------------------------------------- | COMMENT |
| MEDIUM⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 73 | # ---------------------------------------------------------------- | COMMENT |
| MEDIUM⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 121 | # ---------------------------------------------------------------- | COMMENT |
| MEDIUM⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 123 | # ---------------------------------------------------------------- | COMMENT |
| MEDIUM⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 244 | # ---------------------------------------------------------------- | COMMENT |
| MEDIUM⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 246 | # ---------------------------------------------------------------- | COMMENT |
| MEDIUM⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 778 | # ===================================================================== | COMMENT |
| MEDIUM⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 780 | # ===================================================================== | COMMENT |
| MEDIUM | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 672 | # ============================================================================= | COMMENT |
| MEDIUM | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 674 | # ============================================================================= | COMMENT |
| MEDIUM⚡ | 9_Firmware/9_3_GUI/GUI_V6_Demo.py | 3 | # ============================================================================= | COMMENT |
| MEDIUM⚡ | 9_Firmware/9_3_GUI/GUI_V6_Demo.py | 7 | # ============================================================================= | COMMENT |
| MEDIUM⚡ | 9_Firmware/9_3_GUI/GUI_V6_Demo.py | 32 | # ============================================================================ | COMMENT |
| MEDIUM⚡ | 9_Firmware/9_3_GUI/GUI_V6_Demo.py | 34 | # ============================================================================ | COMMENT |
| MEDIUM | 9_Firmware/9_3_GUI/GUI_V6_Demo.py | 58 | # ============================================================================ | COMMENT |
| 433 more matches not shown… | ||||
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| LOW | 9_Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.h | 61 | /* Private defines -----------------------------------------------------------*/ | COMMENT |
| LOW | 9_Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.h | 81 | #define ADAR_2_CS_3V3_GPIO_Port GPIOA | COMMENT |
| LOW | 9_Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.h | 101 | #define EN_P_1V8_FPGA_GPIO_Port GPIOE | COMMENT |
| LOW | 9_Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.h | 121 | #define EN_P_1V8_CLOCK_GPIO_Port GPIOG | COMMENT |
| LOW | 9_Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.h | 141 | #define EN_DIS_RFPA_VDD_GPIO_Port GPIOD | COMMENT |
| LOW | 9_Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.h | 161 | #define ADF4382_TX_DELADJ_Pin GPIO_PIN_13 | COMMENT |
| LOW | …mware/9_1_Microcontroller/9_1_3_C_Cpp_Code/um982_gps.h | 21 | #include <math.h> | COMMENT |
| LOW | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 21 | #include "usb_device.h" | COMMENT |
| LOW | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 41 | #include <stdio.h> | COMMENT |
| LOW | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 901 | // Blink LED pattern based on error code | COMMENT |
| LOW | 9_Firmware/9_1_Microcontroller/tests/stm32_hal_mock.h | 21 | #include <string.h> | COMMENT |
| LOW | 9_Firmware/9_1_Microcontroller/tests/stm32_hal_mock.h | 61 | #define GPIO_PIN_8 ((uint16_t)0x0100) | COMMENT |
| LOW | …_1_Microcontroller/tests/test_bug7_gpio_pin_conflict.c | 21 | COMMENT | |
| LOW | …ware/9_1_Microcontroller/tests/test_agc_outer_loop.cpp | 1 | // test_agc_outer_loop.cpp -- C++ unit tests for ADAR1000_AGC outer-loop AGC | COMMENT |
| LOW | …rmware/9_1_Microcontroller/tests/shims/stm32f7xx_hal.h | 1 | /* shim: redirect stm32f7xx_hal.h -> our mock */ | COMMENT |
| LOW | 9_Firmware/9_1_Microcontroller/tests/shims/main.h | 1 | /* shim: redirect main.h -> our mock + pin defines from real main.h */ | COMMENT |
| LOW | 9_Firmware/9_1_Microcontroller/tests/shims/main.h | 21 | #define AD9523_RESET_Pin GPIO_PIN_6 | COMMENT |
| LOW | 9_Firmware/9_1_Microcontroller/tests/shims/main.h | 41 | #define LED_1_Pin GPIO_PIN_12 | COMMENT |
| LOW | 9_Firmware/9_1_Microcontroller/tests/shims/main.h | 61 | #define EN_P_3V3_CLOCK_GPIO_Port GPIOG | COMMENT |
| LOW | 9_Firmware/9_1_Microcontroller/tests/shims/main.h | 81 | #define ADF4382_TX_CE_Pin GPIO_PIN_15 | COMMENT |
| LOW | 9_Firmware/9_1_Microcontroller/tests/shims/main.h | 101 | #define EN_P_3V3_VDD_SW_Pin GPIO_PIN_15 | COMMENT |
| LOW | 9_Firmware/9_1_Microcontroller/tests/shims/main.h | 121 | #define DAC_2_VG_LDAC_Pin GPIO_PIN_9 | COMMENT |
| LOW | 9_Firmware/9_1_Microcontroller/tests/shims/diag_log.h | 1 | /* shim: diag_log.h -- disable DIAG macros for test builds */ | COMMENT |
| LOW | 9_Firmware/9_1_Microcontroller/tests/shims/no_os_spi.h | 1 | /* shim: redirect no_os_spi.h -> our mock types */ | COMMENT |
| LOW | 9_Firmware/9_1_Microcontroller/tests/shims/adf4382.h | 1 | /* shim: redirect adf4382.h -> our mock types */ | COMMENT |
| LOW | …Firmware/9_1_Microcontroller/tests/shims/no_os_units.h | 1 | /* shim: redirect no_os_units.h -> minimal defines */ | COMMENT |
| LOW | …are/9_1_Microcontroller/tests/shims/adf4382a_manager.h | 21 | /* RX pins: GPIOG pins 6-10 */ | COMMENT |
| LOW | …are/9_1_Microcontroller/tests/shims/adf4382a_manager.h | 41 | #define TX_CS_GPIO_Port GPIOG | COMMENT |
| LOW | …are/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/ad9523.h | 41 | /* Registers */ | COMMENT |
| LOW | …are/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/ad9523.h | 61 | #define AD9523_PLL1_REF_B_DIVIDER (AD9523_R2B | 0x13) | COMMENT |
| LOW | …are/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/ad9523.h | 81 | #define AD9523_PLL1_OUTPUT_CHANNEL_CTRL (AD9523_R1B | 0x1BB) | COMMENT |
| LOW | …are/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/ad9523.h | 101 | #define AD9523_READBACK_CTRL_READ_BUFFERED (1 << 0) | COMMENT |
| LOW | …are/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/ad9523.h | 121 | #define AD9523_PLL1_REFA_REFB_PWR_CTRL_EN (1 << 2) | COMMENT |
| LOW | …are/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/ad9523.h | 141 | #define AD9523_PLL1_BYPASS_REFA_DIV (1 << 0) | COMMENT |
| LOW | …are/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/ad9523.h | 161 | #define AD9523_PLL2_BACKLASH_PW_HIGH (2 << 2) | COMMENT |
| LOW | …are/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/ad9523.h | 181 | #define AD9523_PLL2_LOOP_FILTER_RZERO(x) (((x) & 0x7) << 3) | COMMENT |
| LOW | …are/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/ad9523.h | 201 | #define AD9523_PLL1_OUTP_CTRL_VCO_DIV_SEL_CH5_M2 (1 << 6) | COMMENT |
| LOW | …are/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/ad9523.h | 221 | #define AD9523_READBACK_0_STAT_PLL2_REF_CLK (1 << 7) | COMMENT |
| LOW | …1_Microcontroller/9_1_1_C_Cpp_Libraries/ADAR1000_AGC.h | 1 | // ADAR1000_AGC.h -- STM32 outer-loop AGC for ADAR1000 RX VGA gain | COMMENT |
| LOW | …1_Microcontroller/9_1_1_C_Cpp_Libraries/ADAR1000_AGC.h | 21 | #define ADAR1000_AGC_H | COMMENT |
| LOW | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 21 | }; | COMMENT |
| LOW | …9_1_Microcontroller/9_1_1_C_Cpp_Libraries/no_os_mdio.h | 41 | #define NO_OS_MDIO_C45_START 0 | COMMENT |
| LOW | …crocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.h | 181 | #define REG_SCRATCHPAD 0x00A | COMMENT |
| LOW | …crocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.h | 201 | #define REG_CH2_TX_PHS_Q 0x023 | COMMENT |
| LOW | …crocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.h | 221 | #define REG_PA_CH1_BIAS_OFF 0x046 | COMMENT |
| LOW | …/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/no_os_i3c.h | 41 | #define _NO_OS_I3C_H_ | COMMENT |
| LOW | …/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/no_os_i3c.h | 61 | #define NO_OS_I3C_CCC_BCAST 0 | COMMENT |
| LOW | …/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/no_os_i3c.h | 81 | #define NO_OS_I3C_CCC_DISEC_BCAST 0x01 | NO_OS_I3C_CCC_SET_DEF | COMMENT |
| LOW | …/9_1_Microcontroller/9_1_1_C_Cpp_Libraries/no_os_i3c.h | 101 | #define NO_OS_I3C_CCC_SETDASA NO_OS_I3C_CCC_ID(0x7, NO_OS_I3C_CCC_DIRECT) | COMMENT |
| LOW | …ocontroller/9_1_1_C_Cpp_Libraries/stm32f7xx_hal_conf.h | 81 | /* #define HAL_EXTI_MODULE_ENABLED */ | COMMENT |
| LOW | …ocontroller/9_1_1_C_Cpp_Libraries/stm32f7xx_hal_conf.h | 141 | COMMENT | |
| LOW | …ocontroller/9_1_1_C_Cpp_Libraries/stm32f7xx_hal_conf.h | 161 | #define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U /* DFSDM register callback disabled */ | COMMENT |
| LOW | …ocontroller/9_1_1_C_Cpp_Libraries/stm32f7xx_hal_conf.h | 181 | #define USE_HAL_SAI_REGISTER_CALLBACKS 0U /* SAI register callback disabled */ | COMMENT |
| LOW | …ocontroller/9_1_1_C_Cpp_Libraries/stm32f7xx_hal_conf.h | 221 | /* DP83848_PHY_ADDRESS Address*/ | COMMENT |
| LOW | …ocontroller/9_1_1_C_Cpp_Libraries/stm32f7xx_hal_conf.h | 241 | #define PHY_HALFDUPLEX_10M ((uint16_t)0x0000U) /*!< Set the half-duplex mode at 10 Mb/s */ | COMMENT |
| LOW | …ocontroller/9_1_1_C_Cpp_Libraries/stm32f7xx_hal_conf.h | 281 | #endif /* HAL_GPIO_MODULE_ENABLED */ | COMMENT |
| LOW | …ocontroller/9_1_1_C_Cpp_Libraries/stm32f7xx_hal_conf.h | 301 | #endif /* HAL_CEC_MODULE_ENABLED */ | COMMENT |
| LOW | …ocontroller/9_1_1_C_Cpp_Libraries/stm32f7xx_hal_conf.h | 321 | #endif /* HAL_DCMI_MODULE_ENABLED */ | COMMENT |
| LOW | …ocontroller/9_1_1_C_Cpp_Libraries/stm32f7xx_hal_conf.h | 341 | #endif /* HAL_NOR_MODULE_ENABLED */ | COMMENT |
| LOW | …ocontroller/9_1_1_C_Cpp_Libraries/stm32f7xx_hal_conf.h | 361 | #endif /* HAL_I2S_MODULE_ENABLED */ | COMMENT |
| 51 more matches not shown… | ||||
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| LOW | 9_Firmware/tests/cross_layer/contract_parser.py | 130 | def parse_python_packet_constants(filepath: Path | None = None) -> dict[str, PacketConstants]: | CODE |
| LOW | 9_Firmware/tests/cross_layer/contract_parser.py | 155 | def parse_python_data_packet_fields(filepath: Path | None = None) -> list[DataPacketField]: | CODE |
| LOW | 9_Firmware/tests/cross_layer/contract_parser.py | 221 | def parse_python_status_fields(filepath: Path | None = None) -> list[StatusWordField]: | CODE |
| LOW | 9_Firmware/tests/cross_layer/contract_parser.py | 375 | def parse_verilog_reset_defaults(filepath: Path | None = None) -> dict[str, int]: | CODE |
| LOW | 9_Firmware/tests/cross_layer/contract_parser.py | 412 | def parse_verilog_register_widths(filepath: Path | None = None) -> dict[str, int]: | CODE |
| LOW | 9_Firmware/tests/cross_layer/contract_parser.py | 435 | def parse_verilog_packet_constants( | CODE |
| LOW | 9_Firmware/tests/cross_layer/contract_parser.py | 528 | def parse_verilog_status_word_concats( | CODE |
| LOW | 9_Firmware/tests/cross_layer/contract_parser.py | 558 | def get_usb_interface_port_widths(filepath: Path | None = None) -> dict[str, int]: | CODE |
| LOW⚡ | …irmware/tests/cross_layer/test_cross_layer_contract.py | 240 | def test_python_opcodes_match_ground_truth(self): | CODE |
| LOW⚡ | …irmware/tests/cross_layer/test_cross_layer_contract.py | 249 | def test_ground_truth_opcodes_in_python(self): | CODE |
| LOW⚡ | …irmware/tests/cross_layer/test_cross_layer_contract.py | 257 | def test_verilog_opcodes_match_ground_truth(self): | CODE |
| LOW⚡ | …irmware/tests/cross_layer/test_cross_layer_contract.py | 265 | def test_ground_truth_opcodes_in_verilog(self): | CODE |
| LOW⚡ | …irmware/tests/cross_layer/test_cross_layer_contract.py | 273 | def test_python_verilog_bidirectional_match(self): | CODE |
| LOW⚡ | …irmware/tests/cross_layer/test_cross_layer_contract.py | 282 | def test_verilog_register_names_match(self): | CODE |
| LOW⚡ | …irmware/tests/cross_layer/test_cross_layer_contract.py | 813 | def test_ground_truth_quadrant_symmetry(self): | CODE |
| LOW⚡ | …irmware/tests/cross_layer/test_cross_layer_contract.py | 823 | def test_ground_truth_cardinal_points(self): | CODE |
| LOW⚡ | …irmware/tests/cross_layer/test_cross_layer_contract.py | 833 | def test_firmware_vm_i_matches_datasheet(self, cpp_source): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 81 | def _strip_cxx_comments_and_strings(src: str) -> str: | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 297 | def test_verilog_register_widths(self): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 309 | def test_verilog_opcode_bit_slices(self): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 370 | def test_python_status_mode_position(self): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 394 | def test_python_packet_constants(self): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 408 | def test_verilog_packet_constants(self): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 422 | def test_python_verilog_constants_agree(self): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 435 | def test_verilog_reset_defaults(self): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 468 | def test_fpga_agc_enable_boot_default_off(self): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 479 | def test_mcu_agc_constructor_default_off(self): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 503 | def test_boot_invariant_all_layers_agc_off(self): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 631 | def test_verilog_data_mux_field_positions(self): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 650 | def test_python_data_packet_byte_positions(self): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 673 | def test_field_order_and_sizes(self): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 779 | def test_ground_truth_table_shape(self): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 792 | def test_ground_truth_byte_format(self): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 855 | def test_firmware_vm_q_matches_datasheet(self, cpp_source): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 876 | def test_vm_gain_table_is_not_reintroduced(self, cpp_source): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 900 | def test_adversarial_corruption_is_detected(self): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 1004 | def test_data_packet_python_round_trip(self, tb_results): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 1047 | def test_status_packet_python_round_trip(self, tb_results): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 1184 | def test_default_values_round_trip(self, stub_binary): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 1214 | def test_distinctive_values_round_trip(self, stub_binary): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 1244 | def test_truncated_packet_rejected(self, stub_binary): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 1252 | def test_bad_markers_rejected(self, stub_binary): | CODE |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 1273 | def test_python_c_packet_format_agreement(self, stub_binary): | CODE |
| LOW | 9_Firmware/9_3_GUI/GUI_V5_Demo.py | 257 | def _parse_binary_gps_with_pitch(self, data): | CODE |
| LOW | 9_Firmware/9_3_GUI/GUI_V5_Demo.py | 663 | def generate_map_html_content(self, gps_data, targets, coverage_radius): | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 34 | def test_build_command_trigger(self): | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 43 | def test_build_command_cfar_alpha(self): | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 50 | def test_build_command_status_request(self): | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 57 | def test_build_command_with_addr(self): | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 65 | def test_build_command_value_clamp(self): | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 87 | def test_parse_data_packet_basic(self): | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 97 | def test_parse_data_packet_with_detection(self): | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 103 | def test_parse_data_packet_negative_values(self): | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 113 | def test_parse_data_packet_too_short(self): | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 116 | def test_parse_data_packet_wrong_header(self): | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 180 | def test_parse_status_range_mode(self): | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 185 | def test_parse_status_too_short(self): | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 188 | def test_parse_status_wrong_header(self): | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 193 | def test_parse_status_wrong_footer(self): | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 198 | def test_parse_status_self_test_all_pass(self): | CODE |
| 70 more matches not shown… | ||||
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| LOW⚡ | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 359 | // Step 1: Initialize ADTR1107 power sequence | COMMENT |
| LOW⚡ | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 369 | // Step 2: Initialize all ADAR1000 devices | COMMENT |
| LOW⚡ | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 379 | // Step 3: Perform system calibration | COMMENT |
| LOW⚡ | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 389 | // Step 4: Set to safe TX mode | COMMENT |
| LOW⚡ | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 404 | // Step 1: Set all devices to RX mode (safest state) | COMMENT |
| LOW⚡ | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 409 | // Step 2: Disable PA power supplies | COMMENT |
| LOW⚡ | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 414 | // Step 3: Set PA biases to safe values | COMMENT |
| LOW⚡ | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 424 | // Step 4: Disable LNA power supply | COMMENT |
| LOW⚡ | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 429 | // Step 5: Set LNA bias to safe value | COMMENT |
| LOW⚡ | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 436 | // Step 6: Disable switch power supplies | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 454 | // Step 1: Connect all GND pins to ground (assumed in hardware) | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 457 | // Step 2: Set VDD_SW to 3.3V | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 462 | // Step 3: Set VSS_SW to -3.3V | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 467 | // Step 4: Set CTRL_SW to RX mode initially via GPIO | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 472 | // Step 5: Set VGG_LNA to 0 | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 480 | // Step 6: Set VDD_LNA to 0V for TX mode | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 485 | // Step 7: Set VGG_PA to safe negative voltage (PA off for TX mode) | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 499 | // Step 8: Set VDD_PA to 0V (PA powered up for TX mode) | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 504 | // Step 9: Adjust VGG_PA voltage between −1.75 V and −0.25 V to achieve the desired IDQ_PA=220mA | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 573 | // Step 1: Disable LNA power first | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 578 | // Step 2: Set LNA bias to safe off value | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 585 | // Step 3: Enable PA power | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 590 | // Step 4: Set PA bias to operational value | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 614 | // Step 1: Disable PA power first | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 619 | // Step 2: Set PA bias to safe negative voltage | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 630 | // Step 3: Enable LNA power | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 635 | // Step 4: Set LNA bias to operational value | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 643 | // Step 5: Set TR switch to RX mode | COMMENT |
| LOW | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 601 | // Step 5: Set TR switch to TX mode | COMMENT |
| LOW⚡ | 9_Firmware/9_3_GUI/smoke_test.py | 84 | # Step 1: Connect | COMMENT |
| LOW⚡ | 9_Firmware/9_3_GUI/smoke_test.py | 89 | # Step 2: Send self-test trigger (opcode 0x30) | COMMENT |
| LOW⚡ | 9_Firmware/9_3_GUI/smoke_test.py | 96 | # Step 3: Wait for completion and read results | COMMENT |
| LOW⚡ | 9_Firmware/9_3_GUI/smoke_test.py | 104 | # Step 4: Decode results | COMMENT |
| LOW⚡ | 9_Firmware/9_3_GUI/smoke_test.py | 108 | # Step 5: ADC data dump (if requested and test 4 passed) | COMMENT |
| LOW⚡ | 9_Firmware/9_3_GUI/smoke_test.py | 112 | # Step 6: Summary | COMMENT |
| LOW⚡ | 9_Firmware/9_3_GUI/GUI_V5.py | 1323 | # Step 12: Send start flag to STM32 via USB | COMMENT |
| LOW⚡ | 9_Firmware/9_3_GUI/GUI_V5.py | 1328 | # Step 13: Send settings to STM32 via USB | COMMENT |
| LOW | 9_Firmware/9_2_FPGA/adc_clk_mmcm_integration.md | 57 | ### Step 1: Modify `ad9484_interface_400m.v` | COMMENT |
| LOW | 9_Firmware/9_2_FPGA/adc_clk_mmcm_integration.md | 85 | ### Step 2: Gate reset on MMCM lock (recommended) | COMMENT |
| LOW | 9_Firmware/9_2_FPGA/adc_clk_mmcm_integration.md | 113 | ### Step 3: Add constraint file | COMMENT |
| LOW | 9_Firmware/9_2_FPGA/adc_clk_mmcm_integration.md | 124 | ### Step 4: Add to build script | COMMENT |
| LOW | 9_Firmware/9_2_FPGA/adc_clk_mmcm_integration.md | 133 | ### Step 5: Verify | COMMENT |
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| LOW⚡ | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 359 | // Step 1: Initialize ADTR1107 power sequence | COMMENT |
| LOW⚡ | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 369 | // Step 2: Initialize all ADAR1000 devices | COMMENT |
| LOW⚡ | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 379 | // Step 3: Perform system calibration | COMMENT |
| LOW⚡ | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 389 | // Step 4: Set to safe TX mode | COMMENT |
| LOW⚡ | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 404 | // Step 1: Set all devices to RX mode (safest state) | COMMENT |
| LOW⚡ | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 409 | // Step 2: Disable PA power supplies | COMMENT |
| LOW⚡ | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 414 | // Step 3: Set PA biases to safe values | COMMENT |
| LOW⚡ | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 424 | // Step 4: Disable LNA power supply | COMMENT |
| LOW⚡ | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 429 | // Step 5: Set LNA bias to safe value | COMMENT |
| LOW⚡ | …Firmware/9_1_Microcontroller/9_1_3_C_Cpp_Code/main.cpp | 436 | // Step 6: Disable switch power supplies | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 454 | // Step 1: Connect all GND pins to ground (assumed in hardware) | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 457 | // Step 2: Set VDD_SW to 3.3V | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 462 | // Step 3: Set VSS_SW to -3.3V | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 467 | // Step 4: Set CTRL_SW to RX mode initially via GPIO | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 472 | // Step 5: Set VGG_LNA to 0 | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 480 | // Step 6: Set VDD_LNA to 0V for TX mode | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 485 | // Step 7: Set VGG_PA to safe negative voltage (PA off for TX mode) | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 499 | // Step 8: Set VDD_PA to 0V (PA powered up for TX mode) | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 504 | // Step 9: Adjust VGG_PA voltage between −1.75 V and −0.25 V to achieve the desired IDQ_PA=220mA | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 573 | // Step 1: Disable LNA power first | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 578 | // Step 2: Set LNA bias to safe off value | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 585 | // Step 3: Enable PA power | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 590 | // Step 4: Set PA bias to operational value | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 614 | // Step 1: Disable PA power first | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 619 | // Step 2: Set PA bias to safe negative voltage | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 630 | // Step 3: Enable LNA power | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 635 | // Step 4: Set LNA bias to operational value | COMMENT |
| LOW⚡ | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 643 | // Step 5: Set TR switch to RX mode | COMMENT |
| LOW | …ocontroller/9_1_1_C_Cpp_Libraries/ADAR1000_Manager.cpp | 601 | // Step 5: Set TR switch to TX mode | COMMENT |
| LOW⚡ | 9_Firmware/9_3_GUI/smoke_test.py | 84 | # Step 1: Connect | COMMENT |
| LOW⚡ | 9_Firmware/9_3_GUI/smoke_test.py | 89 | # Step 2: Send self-test trigger (opcode 0x30) | COMMENT |
| LOW⚡ | 9_Firmware/9_3_GUI/smoke_test.py | 96 | # Step 3: Wait for completion and read results | COMMENT |
| LOW⚡ | 9_Firmware/9_3_GUI/smoke_test.py | 104 | # Step 4: Decode results | COMMENT |
| LOW⚡ | 9_Firmware/9_3_GUI/smoke_test.py | 108 | # Step 5: ADC data dump (if requested and test 4 passed) | COMMENT |
| LOW⚡ | 9_Firmware/9_3_GUI/smoke_test.py | 112 | # Step 6: Summary | COMMENT |
| LOW⚡ | 9_Firmware/9_3_GUI/GUI_V5.py | 1323 | # Step 12: Send start flag to STM32 via USB | COMMENT |
| LOW⚡ | 9_Firmware/9_3_GUI/GUI_V5.py | 1328 | # Step 13: Send settings to STM32 via USB | COMMENT |
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| LOW | 9_Firmware/tests/cross_layer/contract_parser.py | 17 | CODE | |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 27 | CODE | |
| LOW | 9_Firmware/tests/cross_layer/adar1000_vm_reference.py | 33 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V6.py | 36 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V6.py | 37 | CODE | |
| LOW | 9_Firmware/9_3_GUI/test_v7.py | 270 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/models.py | 20 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/models.py | 21 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/models.py | 28 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/models.py | 29 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/models.py | 30 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/models.py | 37 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/models.py | 44 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/models.py | 51 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 11 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 27 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 27 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 27 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 27 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 27 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 27 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 27 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 27 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 27 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 40 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 40 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 40 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 40 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 40 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 50 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 50 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 56 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 56 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 63 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 63 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 63 | CODE | |
| 17 more matches not shown… | ||||
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| HIGH | 9_Firmware/9_3_GUI/GUI_V5_Demo.py | 555 | if (window.initialTargets && window.initialTargets.length > 0) { | CODE |
| HIGH | 9_Firmware/9_3_GUI/GUI_V5_Demo.py | 615 | targetMarkers.push(targetMarker); | CODE |
| HIGH | 9_Firmware/9_3_GUI/GUI_PyQt_Map.py | 443 | var bridge = null; | CODE |
| HIGH | 9_Firmware/9_3_GUI/GUI_PyQt_Map.py | 444 | var currentTileLayer = null; | CODE |
| HIGH | 9_Firmware/9_3_GUI/GUI_V6.py | 195 | targetMarkers.forEach(marker => marker.setMap(null)); | CODE |
| HIGH | 9_Firmware/9_3_GUI/GUI_V6.py | 233 | targetMarkers.push(targetMarker); | CODE |
| HIGH | 9_Firmware/9_3_GUI/GUI_V5.py | 208 | targetMarkers.forEach(marker => marker.setMap(null)); | CODE |
| HIGH | 9_Firmware/9_3_GUI/GUI_V5.py | 244 | targetMarkers.push(targetMarker); | CODE |
| HIGH | 9_Firmware/9_3_GUI/v7/map_widget.py | 252 | var bridge = null; | STRING |
| HIGH | 9_Firmware/9_3_GUI/v7/map_widget.py | 253 | var currentTileLayer = null; | STRING |
| HIGH⚡ | 9_Firmware/9_2_FPGA/tb/cosim/fpga_model.py | 672 | Cycle 1: valid_sync = valid_i_reg && valid_q_reg | STRING |
| HIGH | …rmware/9_2_FPGA/tb/cosim/real_data/golden_reference.py | 799 | (bin_within_sf < width || bin_within_sf > (15 - width + 1)) | STRING |
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| HIGH | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 432 | except queue.Empty: | CODE |
| HIGH | 9_Firmware/9_3_GUI/radar_protocol.py | 701 | except (OSError, ValueError, RuntimeError): | CODE |
| HIGH | 9_Firmware/9_3_GUI/GUI_V6.py | 1645 | except queue.Empty: | CODE |
| HIGH | 9_Firmware/9_3_GUI/GUI_V5.py | 1597 | except queue.Empty: | CODE |
| HIGH | 9_Firmware/9_3_GUI/v7/__init__.py | 51 | except ImportError: # golden_reference.py not available (e.g. deployment without FPGA tree) | CODE |
| HIGH | 9_Firmware/9_3_GUI/v7/__init__.py | 57 | except ImportError: # software_fpga unavailable → replay also unavailable | CODE |
| HIGH | 9_Firmware/9_3_GUI/v7/__init__.py | 79 | except ImportError: # PyQt6 not installed (e.g. CI headless runner) | CODE |
| HIGH | 9_Firmware/9_3_GUI/v7/dashboard.py | 2075 | except RuntimeError: | CODE |
| HIGH | 9_Firmware/9_2_FPGA/tb/cosim/fpga_model.py | 1400 | except FileNotFoundError: | CODE |
| HIGH | …rmware/9_2_FPGA/tb/cosim/real_data/golden_reference.py | 1431 | except ImportError: | CODE |
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| LOW | 9_Firmware/tools/uart_capture.py | 227 | CODE | |
| LOW | 9_Firmware/tests/cross_layer/contract_parser.py | 757 | CODE | |
| LOW | …irmware/tests/cross_layer/test_cross_layer_contract.py | 81 | CODE | |
| LOW | 9_Firmware/9_3_GUI/smoke_test.py | 123 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V5_Demo.py | 737 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V6_Demo.py | 172 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V6_Demo.py | 977 | CODE | |
| LOW | 9_Firmware/9_3_GUI/radar_protocol.py | 265 | CODE | |
| LOW | 9_Firmware/9_3_GUI/radar_protocol.py | 734 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V6.py | 268 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V6.py | 415 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V6.py | 535 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V6.py | 1321 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V6.py | 1393 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V6.py | 1433 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V6.py | 1453 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V6.py | 1614 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V6.py | 1739 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V6.py | 1765 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V65_Tk.py | 186 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V65_Tk.py | 351 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V65_Tk.py | 1413 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V5.py | 332 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V5.py | 1289 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V5.py | 1388 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V5.py | 1414 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V5.py | 1436 | CODE | |
| LOW | 9_Firmware/9_3_GUI/GUI_V5.py | 1566 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/dashboard.py | 1289 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/hardware.py | 74 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/processing.py | 81 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/processing.py | 165 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/workers.py | 105 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/workers.py | 273 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/workers.py | 518 | CODE | |
| LOW | 9_Firmware/9_3_GUI/v7/agc_sim.py | 157 | CODE | |
| LOW | 9_Firmware/9_2_FPGA/tb/cosim/fpga_model.py | 136 | CODE | |
| LOW | 9_Firmware/9_2_FPGA/tb/cosim/fpga_model.py | 413 | CODE | |
| LOW | 9_Firmware/9_2_FPGA/tb/cosim/fpga_model.py | 1000 | CODE | |
| LOW | 9_Firmware/9_2_FPGA/tb/cosim/fpga_model.py | 1260 | CODE | |
| LOW | 9_Firmware/9_2_FPGA/tb/cosim/radar_scene.py | 361 | CODE | |
| LOW | 9_Firmware/9_2_FPGA/tb/cosim/radar_scene.py | 450 | CODE | |
| LOW | 9_Firmware/9_2_FPGA/tb/cosim/compare.py | 415 | CODE | |
| LOW | …rmware/9_2_FPGA/tb/cosim/real_data/golden_reference.py | 534 | CODE | |
| LOW | …rmware/9_2_FPGA/tb/cosim/real_data/golden_reference.py | 626 | CODE | |
| LOW | …rmware/9_2_FPGA/tb/cosim/real_data/golden_reference.py | 824 | CODE | |
| LOW | …rmware/9_2_FPGA/tb/cosim/real_data/golden_reference.py | 1012 | CODE | |
| LOW | 8_Utils/Python/CSV_radar_2.py | 5 | CODE | |
| LOW | 8_Utils/Python/CSV_radar.py | 5 | CODE |
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| LOW⚡ | 9_Firmware/9_3_GUI/GUI_V6_Demo.py | 30 | logger = logging.getLogger(__name__) | CODE |
| LOW | 9_Firmware/9_3_GUI/GUI_V7_PyQt.py | 23 | logger = logging.getLogger(__name__) | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/GUI_PyQt_Map.py | 53 | logger = logging.getLogger(__name__) | CODE |
| LOW | 9_Firmware/9_3_GUI/v7/__init__.py | 82 | __all__ = [ # noqa: RUF022 | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/v7/software_fpga.py | 103 | def set_detect_threshold(self, val: int) -> None: | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/v7/software_fpga.py | 106 | def set_gain_shift(self, val: int) -> None: | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/v7/software_fpga.py | 109 | def set_cfar_enable(self, val: bool) -> None: | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/v7/software_fpga.py | 112 | def set_cfar_guard(self, val: int) -> None: | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/v7/software_fpga.py | 115 | def set_cfar_train(self, val: int) -> None: | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/v7/software_fpga.py | 118 | def set_cfar_alpha(self, val: int) -> None: | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/v7/software_fpga.py | 121 | def set_cfar_mode(self, val: int) -> None: | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/v7/software_fpga.py | 124 | def set_mti_enable(self, val: bool) -> None: | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/v7/software_fpga.py | 127 | def set_dc_notch_width(self, val: int) -> None: | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/v7/software_fpga.py | 130 | def set_agc_enable(self, val: bool) -> None: | CODE |
| LOW | 9_Firmware/9_3_GUI/v7/dashboard.py | 74 | logger = logging.getLogger(__name__) | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/v7/map_widget.py | 32 | logger = logging.getLogger(__name__) | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/v7/hardware.py | 37 | logger = logging.getLogger(__name__) | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/v7/processing.py | 35 | logger = logging.getLogger(__name__) | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/v7/workers.py | 41 | logger = logging.getLogger(__name__) | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/v7/workers.py | 474 | def set_gps(self, gps: GPSData | None) -> None: | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/v7/workers.py | 477 | def set_waveform(self, wf) -> None: | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/v7/workers.py | 480 | def set_loop(self, loop: bool) -> None: | CODE |
| LOW⚡ | 9_Firmware/9_3_GUI/v7/workers.py | 483 | def set_frame_interval(self, ms: int) -> None: | CODE |
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| MEDIUM⚡ | 9_Firmware/9_3_GUI/GUI_V6_Demo.py | 5 | # This file is retained for reference only. Do not use for new development. | COMMENT |
| MEDIUM⚡ | 9_Firmware/9_3_GUI/GUI_V6.py | 3 | # This file is retained for reference only. Do not use for new development. | COMMENT |
| MEDIUM | 8_Utils/Python/RADAR_eq.py | 16 | # Create main container | COMMENT |
| MEDIUM | 8_Utils/Python/RADAR_eq.py | 56 | # Create a canvas with scrollbar for input fields | COMMENT |
| MEDIUM | 8_Utils/Python/RADAR_eq.py | 87 | # Create a frame for each input row | COMMENT |
| MEDIUM | 8_Utils/Python/RADAR_eq.py | 162 | # Create a frame for each result row | COMMENT |
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| HIGH | 9_Firmware/9_3_GUI/GUI_V5_Demo.py | 0 | parse binary gps format with pitch angle (30 bytes) | STRING |
| HIGH | 9_Firmware/9_3_GUI/GUI_V6.py | 0 | parse binary gps format with pitch angle (30 bytes) | STRING |
| HIGH | 9_Firmware/9_3_GUI/GUI_V5.py | 0 | parse binary gps format with pitch angle (30 bytes) | STRING |
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| LOW | 9_Firmware/9_3_GUI/GUI_PyQt_Map.py | 1090 | # Check if target is still in range | COMMENT |
| LOW | 9_Firmware/9_2_FPGA/tb/cosim/validate_mem_files.py | 187 | # Check if this looks like it came from generate_reference_chirp_q15 | COMMENT |
| LOW | 9_Firmware/9_2_FPGA/tb/cosim/validate_mem_files.py | 236 | # Check if bandwidth roughly matches expected | COMMENT |
| LOW | 9_Firmware/9_2_FPGA/tb/cosim/validate_mem_files.py | 344 | # Check if they match (they almost certainly won't based on magnitude analysis) | COMMENT |
| LOW | 9_Firmware/9_2_FPGA/tb/cosim/radar_scene.py | 256 | # Check if this sample falls within the delayed chirp | COMMENT |
| LOW | 9_Firmware/9_2_FPGA/tb/cosim/gen_doppler_golden.py | 196 | # Check if a specific scenario was requested | COMMENT |
| LOW | 8_Utils/Python/LUT.py | 22 | # Print values in Verilog-friendly format | COMMENT |
| LOW⚡ | …mulations/Antenna/openems_quartz_slotted_wg_10p5GHz.py | 23 | #Set PROFILE to "sanity" first; run and check [mesh] cells: stays reasonable. | COMMENT |
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| LOW | 9_Firmware/9_3_GUI/GUI_V5_Demo.py | 1422 | except Exception as e: # noqa: BLE001 | CODE |
| LOW | 9_Firmware/9_3_GUI/GUI_V6_Demo.py | 1223 | except Exception as e: # noqa: BLE001 | CODE |
| LOW | 9_Firmware/9_3_GUI/radar_protocol.py | 773 | except Exception as e: # noqa: BLE001 | CODE |
| LOW | 9_Firmware/9_3_GUI/GUI_V6.py | 1820 | except Exception as e: # noqa: BLE001 | CODE |
| LOW | 9_Firmware/9_3_GUI/GUI_V65_Tk.py | 1191 | except Exception as exc: # noqa: BLE001 | CODE |
| MEDIUM | 9_Firmware/9_3_GUI/GUI_V65_Tk.py | 1144 | def _send_custom(self): | CODE |
| LOW | 9_Firmware/9_3_GUI/GUI_V5.py | 1663 | except Exception as e: # noqa: BLE001 | CODE |
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| LOW | 9_Firmware/9_2_FPGA/tb/cosim/gen_multiseg_golden.py | 186 | # Generate per-segment reference chirps (just use known patterns) | COMMENT |
| MEDIUM | 5_Simulations/Fencing/Via_fencing.py | 7 | via_pad_B = 0.45 # robust pad case | CODE |
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| LOW | 9_Firmware/9_3_GUI/test_GUI_V65_Tk.py | 124 | CODE | |
| LOW | …ions/DAC_ReconstructionFilter/Generate_ChirpcsvFile.py | 5 | CODE |
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| MEDIUM⚡ | 9_Firmware/9_3_GUI/GUI_PyQt_Map.py | 1022 | """Simulates radar targets for demonstration purposes""" | STRING |
| Severity | File | Line | Snippet | Context |
|---|---|---|---|---|
| LOW | 8_Utils/Python/patch_antenna.py | 58 | # Example usage | COMMENT |